Name: Accelerate HPC End-to-end Software and Hardware Design Pipelines
Uploaded: 2023-07-07T15:19:36.217Z
Duration: 49 min 43 s
Description: Learn how disaggregated storage with high performance and capacity-optimized options can enhance the performance of RTL source code and binaries and still keep costs down.

49:43 Webinars

Accelerate HPC End-to-end Software and Hardware Design Pipelines

Learn how disaggregated storage with high performance and capacity-optimized options can enhance the performance of RTL source code and binaries and still keep costs down.

This webinar first aired on 14 juin 2023

The first 5 minute(s) of our recorded Webinars are open; however, if you are enjoying them, we��ll ask for a little information to finish watching.

Pure//Accelerate

HPC workloads, including software development and semiconductor design (EDA), are challenged to meet razor-thin margins and shrink product pipeline cycles. Learn how disaggregated storage with high performance and capacity-optimized options can enhance the performance of RTL source code and binaries and still keep costs down. See how development tools, such as Perforce and JFrog Artifactory, can gain a significant performance and efficiency boost.

Continue Watching

We hope you found this preview valuable. To continue watching this video please provide your information below.

Ce site est prot��g�� par reCAPTCHA. La??ainsi que les??de Google s��appliquent.

Votre navigateur n��est plus pris en charge !

Les anciens navigateurs pr��sentent souvent des risques de s��curit��. Pour profiter de la meilleure exp��rience possible sur notre site, passez �� la derni��re version de l��un des navigateurs suivants.

ɫ�ش�ý

Accelerate HPC End-to-end Software and Hardware Design Pipelines